1. Field of the Invention
The present invention is related to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a power semiconductor device such as an insulating gate bipolar transistor.
2. Description of the Related Art
FIG. 4 and FIGS. 5A through 5D show steps for manufacturing a conventional semiconductor device, at which the back surface of a semiconductor wafer is polished and back surface metal is disposed. FIG. 4 is a top view of a semiconductor wafer 1, while FIGS. 5A through 5D are cross sectional views of FIG. 4 taken along the IV-IV direction. The conventional manufacturing steps shown in FIGS. 5A through 5D include the following steps 1 through 4.
Step 1: As shown in FIGS. 4 and 5A, a semiconductor element 2 is formed on the semiconductor wafer 1 of silicon or the like. The film thickness of the semiconductor wafer 1 is t1 (before polishing).
Step 2: As shown in FIG. 5B, for reduction of the resistance of the semiconductor element 2, the semiconductor wafer 1 is polished at its back surface into the film thickness of t2 (after polishing).
Step 3: As shown in FIG. 5C, a first metal layer 3 of Al or Al—Si alloy for instance is formed on the back surface of the semiconductor wafer 1. Following this, a barrier metal layer 4 of Ti, Mo or V for instance, a second metal layer 5 of Ni for instance, and a third metal layer 6 of Au, Ag or Au—Ag alloy for instance are formed one after another by vapor deposition, sputtering, etc.
Step 4: The semiconductor wafer 1 now seating on its back surface the four layers of the metal films is loaded into a furnace which is kept at the temperature of approximately from 300 to 470° C. and sintered. This causes the semiconductor wafer 1 and the first metal layer 3 to diffuse into each other, which creates an excellent ohmic contact (JPA 04-072764).